- a -
- access_count
: champsim::msl::lru_table< T, SetProj, TagProj >
- active_request
: DRAM_CHANNEL
- addr
: test::pref_cache_operate_interface
- address
: CACHE::BLOCK
, CACHE::mshr_type
, CACHE::tag_lookup_type
, champsim::channel::request
, champsim::channel::response
, DRAM_CHANNEL::request_type
, PageTableWalker::mshr_type
- address_that_will_hit
: merge_testbed
- addresses
: do_nothing_MRC
- age
: lentry
- AltBank
: my_predictor
- alttaken
: my_predictor
- args_
: champsim::repeatable< T, Args >
- asid
: CACHE::mshr_type
, CACHE::tag_lookup_type
, champsim::channel::request
, cloudsuite_instr
, DRAM_CHANNEL::request_type
, LSQ_ENTRY
, ooo_model_instr
, PageTableWalker::mshr_type
- avg_miss_latency
: cache_stats