ChampSim
DRAM_CHANNEL Struct Reference

#include <dram_controller.h>

Collaboration diagram for DRAM_CHANNEL:
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Classes

struct  BANK_REQUEST
 
struct  request_type
 

Public Types

using response_type = typename champsim::channel::response_type
 
using value_type = request_type
 
using queue_type = std::vector< std::optional< value_type > >
 
using request_array_type = std::array< BANK_REQUEST, DRAM_RANKS *DRAM_BANKS >
 
using stats_type = dram_stats
 

Public Member Functions

void check_collision ()
 
void print_deadlock ()
 

Public Attributes

queue_type WQ {DRAM_WQ_SIZE}
 
queue_type RQ {DRAM_RQ_SIZE}
 
request_array_type bank_request = {}
 
request_array_type::iterator active_request = std::end(bank_request)
 
bool write_mode = false
 
uint64_t dbus_cycle_available = 0
 
stats_type roi_stats
 
stats_type sim_stats
 

Member Typedef Documentation

◆ queue_type

using DRAM_CHANNEL::queue_type = std::vector<std::optional<value_type> >

◆ request_array_type

using DRAM_CHANNEL::request_array_type = std::array<BANK_REQUEST, DRAM_RANKS * DRAM_BANKS>

◆ response_type

◆ stats_type

◆ value_type

Member Function Documentation

◆ check_collision()

void DRAM_CHANNEL::check_collision ( )

◆ print_deadlock()

void DRAM_CHANNEL::print_deadlock ( )

Member Data Documentation

◆ active_request

request_array_type::iterator DRAM_CHANNEL::active_request = std::end(bank_request)

◆ bank_request

request_array_type DRAM_CHANNEL::bank_request = {}

◆ dbus_cycle_available

uint64_t DRAM_CHANNEL::dbus_cycle_available = 0

◆ roi_stats

stats_type DRAM_CHANNEL::roi_stats

◆ RQ

queue_type DRAM_CHANNEL::RQ {DRAM_RQ_SIZE}

◆ sim_stats

stats_type DRAM_CHANNEL::sim_stats

◆ WQ

queue_type DRAM_CHANNEL::WQ {DRAM_WQ_SIZE}

◆ write_mode

bool DRAM_CHANNEL::write_mode = false

The documentation for this struct was generated from the following files: