MEMORY_CONTROLLER Class Reference

#include <dram_controller.h>

Inheritance diagram for MEMORY_CONTROLLER:

Collaboration diagram for MEMORY_CONTROLLER:

Public Member Functions
	MEMORY_CONTROLLER (double freq_scale, int io_freq, double t_rp, double t_rcd, double t_cas, double turnaround, std::vector< channel_type * > &&ul)
void	initialize () override final
long	operate () override final
void	begin_phase () override final
void	end_phase (unsigned cpu) override final
void	print_deadlock () override final
std::size_t	size () const
uint32_t	dram_get_channel (uint64_t address)
uint32_t	dram_get_rank (uint64_t address)
uint32_t	dram_get_bank (uint64_t address)
uint32_t	dram_get_row (uint64_t address)
uint32_t	dram_get_column (uint64_t address)
Public Member Functions inherited from champsim::operable
	operable (double scale)
long	_operate ()

Public Attributes
std::array< DRAM_CHANNEL, DRAM_CHANNELS >	channels
Public Attributes inherited from champsim::operable
const double	CLOCK_SCALE
double	leap_operation = 0
uint64_t	current_cycle = 0
bool	warmup = true

Private Types
using	channel_type = champsim::channel
using	request_type = typename channel_type::request_type
using	response_type = typename channel_type::response_type

Private Member Functions
void	initiate_requests ()
bool	add_rq (const request_type &pkt, champsim::channel *ul)
bool	add_wq (const request_type &pkt)

Private Attributes
std::vector< channel_type * >	queues
const uint64_t	tRP
const uint64_t	tRCD
const uint64_t	tCAS
const uint64_t	DRAM_DBUS_TURN_AROUND_TIME
const uint64_t	DRAM_DBUS_RETURN_TIME

Static Private Attributes
constexpr static std::size_t	DRAM_WRITE_HIGH_WM = ((DRAM_WQ_SIZE * 7) >> 3)
constexpr static std::size_t	DRAM_WRITE_LOW_WM = ((DRAM_WQ_SIZE * 6) >> 3)
constexpr static std::size_t	MIN_DRAM_WRITES_PER_SWITCH = ((DRAM_WQ_SIZE * 1) >> 2)

Member Typedef Documentation

channel_type

using MEMORY_CONTROLLER::channel_type = champsim::channel

private

request_type

using MEMORY_CONTROLLER::request_type = typename channel_type::request_type

private

response_type

using MEMORY_CONTROLLER::response_type = typename channel_type::response_type

private

Constructor & Destructor Documentation

MEMORY_CONTROLLER()

MEMORY_CONTROLLER::MEMORY_CONTROLLER	(	double	freq_scale,
		int	io_freq,
		double	t_rp,
		double	t_rcd,
		double	t_cas,
		double	turnaround,
		std::vector< channel_type * > &&	ul
	)

Member Function Documentation

add_rq()

bool MEMORY_CONTROLLER::add_rq ( const request_type &  pkt, champsim::channel *  ul  )

private

add_wq()

bool MEMORY_CONTROLLER::add_wq ( const request_type &  pkt )

private

begin_phase()

void MEMORY_CONTROLLER::begin_phase ( )

finaloverridevirtual

Reimplemented from champsim::operable.

dram_get_bank()

uint32_t MEMORY_CONTROLLER::dram_get_bank

(

uint64_t

address

)

dram_get_channel()

uint32_t MEMORY_CONTROLLER::dram_get_channel

(

uint64_t

address

)

dram_get_column()

uint32_t MEMORY_CONTROLLER::dram_get_column

(

uint64_t

address

)

dram_get_rank()

uint32_t MEMORY_CONTROLLER::dram_get_rank

(

uint64_t

address

)

dram_get_row()

uint32_t MEMORY_CONTROLLER::dram_get_row

(

uint64_t

address

)

end_phase()

void MEMORY_CONTROLLER::end_phase ( unsigned  cpu )

finaloverridevirtual

Reimplemented from champsim::operable.

initialize()

void MEMORY_CONTROLLER::initialize ( )

finaloverridevirtual

Reimplemented from champsim::operable.

initiate_requests()

void MEMORY_CONTROLLER::initiate_requests ( )

private

operate()

long MEMORY_CONTROLLER::operate ( )

finaloverridevirtual

Implements champsim::operable.

print_deadlock()

void MEMORY_CONTROLLER::print_deadlock ( )

finaloverridevirtual

Reimplemented from champsim::operable.

size()

std::size_t MEMORY_CONTROLLER::size

(

)

const

Member Data Documentation

channels

std::array<DRAM_CHANNEL, DRAM_CHANNELS> MEMORY_CONTROLLER::channels

DRAM_DBUS_RETURN_TIME

const uint64_t MEMORY_CONTROLLER::DRAM_DBUS_RETURN_TIME

private

DRAM_DBUS_TURN_AROUND_TIME

const uint64_t MEMORY_CONTROLLER::DRAM_DBUS_TURN_AROUND_TIME

private

DRAM_WRITE_HIGH_WM

constexpr static std::size_t MEMORY_CONTROLLER::DRAM_WRITE_HIGH_WM = ((DRAM_WQ_SIZE * 7) >> 3)

staticconstexprprivate

DRAM_WRITE_LOW_WM

constexpr static std::size_t MEMORY_CONTROLLER::DRAM_WRITE_LOW_WM = ((DRAM_WQ_SIZE * 6) >> 3)

staticconstexprprivate

MIN_DRAM_WRITES_PER_SWITCH

constexpr static std::size_t MEMORY_CONTROLLER::MIN_DRAM_WRITES_PER_SWITCH = ((DRAM_WQ_SIZE * 1) >> 2)

staticconstexprprivate

queues

std::vector<channel_type*> MEMORY_CONTROLLER::queues

private

tCAS

const uint64_t MEMORY_CONTROLLER::tCAS

private

tRCD

const uint64_t MEMORY_CONTROLLER::tRCD

private

tRP

const uint64_t MEMORY_CONTROLLER::tRP

private

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The documentation for this class was generated from the following files:

• inc/dram_controller.h
• src/dram_controller.cc