- b -

• bank_request : DRAM_CHANNEL
• base_config : python.test_parse.CompileAllModulesTests , python.test_parse.ConfigRootPassthroughParseTests , python.test_parse.EnvironmentParseTests
• basic_btb : BasicBTB< SETS, WAYS >
• begin_base_update_uops : cpu_stats
• begin_cycles : cpu_stats
• begin_instrs : cpu_stats
• begin_phase_cycle : O3_CPU
• begin_phase_instr : O3_CPU
• bindir_name : config.filewrite.FileWriter
• block : CACHE , champsim::msl::lru_table< T, SetProj, TagProj >
• branch_info : BasicBTB< SETS, WAYS >::ENTRY
• BRANCH_MISPREDICT_PENALTY : O3_CPU
• branch_mispredicted : ooo_model_instr
• branch_prediction : ooo_model_instr
• branch_taken : cloudsuite_instr , input_instr , ooo_model_instr
• branch_target : ooo_model_instr
• branch_type : ooo_model_instr
• branch_type_misses : cpu_stats
• buffer : champsim::inf_istream< Tag, StreamType >
• buffer_size : champsim::bulk_tracereader< T, F >