Here is a list of all class members with links to the classes they belong to:

- d -

• data : CACHE::BLOCK , CACHE::mshr_type , CACHE::tag_lookup_type , champsim::channel::request , champsim::channel::response , champsim::msl::lru_table< T, SetProj, TagProj >::block_t , DRAM_CHANNEL::request_type , PageTableWalker::mshr_type
• data_from_path() : config.modules.ModuleSearchContext
• data_queues() : O3_CPU::Builder< B_FLAG, T_FLAG >
• dbus_count_congested : dram_stats
• dbus_cycle_available : DRAM_CHANNEL
• dbus_cycle_congested : dram_stats
• deadlock() : champsim::deadlock
• DECODE_BUFFER : O3_CPU
• decode_buffer_size() : O3_CPU::Builder< B_FLAG, T_FLAG >
• DECODE_BUFFER_SIZE : O3_CPU
• decode_instruction() : O3_CPU
• decode_latency() : O3_CPU::Builder< B_FLAG, T_FLAG >
• DECODE_LATENCY : O3_CPU
• decode_width() : O3_CPU::Builder< B_FLAG, T_FLAG >
• DECODE_WIDTH : O3_CPU
• decoded : ooo_model_instr
• deflate() : champsim::decomp_tags::bzip2_tag_t , champsim::decomp_tags::gzip_tag_t< window, compression > , champsim::decomp_tags::lzma_tag_t< flags >
• deflate_state_type : champsim::decomp_tags::bzip2_tag_t , champsim::decomp_tags::gzip_tag_t< window, compression > , champsim::decomp_tags::lzma_tag_t< flags >
• delta : spp::GLOBAL_REGISTER , spp::PATTERN_TABLE
• describe() : AdjDiffMatcher , MonotonicallyIncreasingMatcher , StrideMatcher
• destination_memory : cloudsuite_instr , input_instr , ooo_model_instr
• destination_registers : cloudsuite_instr , input_instr , ooo_model_instr
• DIB : O3_CPU
• dib_checked : ooo_model_instr
• dib_set() : O3_CPU::Builder< B_FLAG, T_FLAG >
• dib_type : O3_CPU
• dib_way() : O3_CPU::Builder< B_FLAG, T_FLAG >
• dib_window() : O3_CPU::Builder< B_FLAG, T_FLAG >
• dir : lentry
• direction_prediction_miss : cpu_stats
• dirty : CACHE::BLOCK
• DISPATCH_BUFFER : O3_CPU
• dispatch_buffer_size() : O3_CPU::Builder< B_FLAG, T_FLAG >
• DISPATCH_BUFFER_SIZE : O3_CPU
• dispatch_instruction() : O3_CPU
• dispatch_latency() : O3_CPU::Builder< B_FLAG, T_FLAG >
• DISPATCH_LATENCY : O3_CPU
• dispatch_width() : O3_CPU::Builder< B_FLAG, T_FLAG >
• DISPATCH_WIDTH : O3_CPU
• do_add_queue() : champsim::channel
• do_check_dib() : O3_CPU
• do_complete_execution() : O3_CPU
• do_complete_store() : O3_CPU
• do_dib_update() : O3_CPU
• do_execution() : O3_CPU
• do_fetch_instruction() : O3_CPU
• do_finish_store() : O3_CPU
• do_init_instruction() : O3_CPU
• do_memory_scheduling() : O3_CPU
• do_nothing_MRC() : do_nothing_MRC
• do_predict_branch() : O3_CPU
• do_scheduling() : O3_CPU
• do_sq_forward_to_lq() : O3_CPU
• DRAM_DBUS_RETURN_TIME : MEMORY_CONTROLLER
• DRAM_DBUS_TURN_AROUND_TIME : MEMORY_CONTROLLER
• dram_get_bank() : MEMORY_CONTROLLER
• dram_get_channel() : MEMORY_CONTROLLER
• dram_get_column() : MEMORY_CONTROLLER
• dram_get_rank() : MEMORY_CONTROLLER
• dram_get_row() : MEMORY_CONTROLLER
• dram_view() : champsim::environment
• DRAM_WRITE_HIGH_WM : MEMORY_CONTROLLER
• DRAM_WRITE_LOW_WM : MEMORY_CONTROLLER